The power consumption of the Zynq® UltraScale+™ RFSoC XCZU48DR-2FSVG1517E device must be limited to a 40A maximum current draw on the combined VCCINT and SD-FEC rails. This limitation is rooted in the 0.85V POL powering these rails. It is expected that he 5G workload running on the Zynq UltraScale+ RFSoC can be accommodated well within this power limit.
The
Xilinx® Power
Estimator (XPE) tool must be used to ensure that
this 40A maximum current limit for the combined VCCINT and SD-FEC rails is
observed at the maximum operating junction temperature of 100°C. The card protection
circuit initiates a fatal shutdown if the VCCINT and SD-FEC power consumption
continues to exceed this threshold after the RF_CPU_RST signal has been
asserted.
The T2 card is powered from the PCIe bus, with the following maximum current levels expected from each rail:
- 12V at 4.5A
- 3.3V at 2.5A
The total T2 maximum power consumption is expected to be ~62W.