Debug via CPM PCIe Interface - 2023.2 English

In data center applications and other PCIe interface-hosted systems, the DPC can be accessed via the same PCIe interface in the CPM that is used for host-to-adaptive SoC communication. You can choose how to map the debug function to a PCIe physical function and BAR space. The debug function includes a dedicated PCIe HSDP DMA engine that is used to move debug data between the DPC and host memory.