There are multiple design flows for Versal adaptive SoC, including two flows targeting projects that contain software applications. Recommendations vary based on which design flow you are using. For more information, see the Versal Adaptive SoC System Software Developers Guide (UG1304).
Fixed Hardware Platform Recommendations
When developing software applications for designs created with the fixed hardware platform design flow, AMD recommends using custom Linux drivers to manage the interactions between the application and PL resources.
Extensible Hardware Platform Recommendations
When developing software applications for hardware built through the Vitis platform design flows and the v++ linker, you can use standard AMD embedded development flows, but for
ease-of-use in developing Linux applications, AMD recommends using the Xilinx Runtime (XRT) APIs to manage PL
kernels and AI Engine graphs. For user-managed kernels, you can employ XRT C++ APIs to
read/write into a kernel's AXI4-Lite control
interface. The XRT APIs are optimized to interact with these interfaces and provide
abstract methods for interacting with the accelerators. In addition, using the XRT
APIs enables access to built-in profiling and debug capabilities.
Because XRT APIs can only be used to interact with PL and AI Engine accelerators linked to the platform using the Vitis environment, PL resources that are directly included in the platform must be explicitly managed by the developer using custom drivers. AMD also recommends tailoring the design architecture to allow the application to reset the user-defined PL IP to a known good state to be able to handle errors and when necessary, to reset PL state after an asynchronous soft reset and reloading of the AI Engine. For more information about the Vitis environment and XRT, see the Vitis Unified Software Platform Documentation (UG1416).