AI Engine Power Estimation - 2023.2 English

Versal Adaptive SoC Board System Design Methodology Guide (UG1506)

Document ID
UG1506
Release Date
2023-11-15
Version
2023.2 English

The AI Engine Power page in the Power Design Manager (PDM) tool (download at www.xilinx.com/power) is available for the Versal AI Core series. You can use the PDM tool to conduct both an early estimation and a more detailed estimation after an AI Engine compilation is available.

Following are the recommended flows to enable accurate power estimation:
Power Tip: When considering the Vector Load percentage, use the average loading percentage. Although cores might be available exclusively to some kernels, do not assume that the cores are always executing kernel instructions. You must consider overhead from prefetch, memory accesses, NOPs, stream, and lock stalls. The recommended range is 30% to 70%.
Manual Entry Flow
Use this flow to conduct an early power estimation. Enter details about the AI Engine array, such as clock frequency, number of cores, kernel type, and the percentage load for core during the operation. The supported kernel types are Int8, Int16, and Floating Point.
Import Flow
The AMD Vitis™ tools generate an .xpe file that can be imported to provide an accurate starting point for AI Engine power estimation. After import, the AI Engine page is filled with data from the Vitis tools AI Engine compilation results, and power can be estimated more accurately than with manual entry mode.
Note: For more information, see the Power Design Manager User Guide (UG1556).