These documents provide supplemental material useful with this guide:
- Versal ACAP PCB Design User Guide (UG863)
- Versal ACAP Design Guide (UG1273)
- AI Engine Tools and Flows User Guide (UG1076)
- AI Engine Kernel and Graph Programming Guide (UG1079)
- Versal ACAP Hardware, IP, and Platform Development Methodology Guide (UG1387)
- Versal ACAP System Integration and Validation Methodology Guide (UG1388)
- Versal ACAP System and Solution Planning Methodology Guide (UG1504)
- Xilinx Power Estimator User Guide for Versal ACAP (UG1275)
- Power Design Manager User Guide (UG1556)
- Vivado Design Suite User Guide: I/O and Clock Planning (UG899)
- Vivado Design Suite User Guide: Power Analysis and Optimization (UG907)
- Vivado Design Suite User Guide: Programming and Debugging (UG908)
- AI Engine Kernel and Graph Programming Guide (UG1079)
- Simulating FPGA Power Integrity Using S-Parameter Models (WP411)
- Extending the Thermal Solution by Utilizing Excursion Temperatures (WP517)
- Versal ACAP Schematic Review Checklist (XTP546)
- Versal ACAP GTY and GTYP Transceivers Architecture Manual (AM002)
- Versal ACAP Clocking Resources Architecture Manual (AM003)
- Versal ACAP SelectIO Resources Architecture Manual (AM010)
- Versal ACAP Technical Reference Manual (AM011)
- Versal ACAP Packaging and Pinouts Architecture Manual (AM013)
- Versal ACAP Schematic Review Checklist (XTP546)
- Mechanical and Thermal Design Guidelines for Lidless Flip-Chip Packages (XAPP1301)
- Advanced I/O Wizard LogiCORE IP Product Guide (PG320)
- Versal ACAP CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)