The T1 card skeleton design consists of two separate designs that support the two Xilinx® devices (ZU19/ Zynq® UltraScale+™ MPSoC and ZU21/ Zynq® UltraScale+™ RFSoC) on the card. Each of the designs provides connectivity with the ports on the board from the two devices, and the ZU21 to the ZU19. There is also a 25G x 4 100G Ethernet connection between the ZU19 and ZU21 devices. These two designs allow testing of the connectivity from the host to the card and between the two devices to demonstrate that the board is fully functional.
Note: The T1 skeleton design is limited to
working only in even-numbered PCIe slots. If you use an odd-numbered
slot, designs can be loaded into the devices, but the tests described in Running the Tests do not run.