FPGA Mezzanine Card Interface

ZCU670 Evaluation Board User Guide (UG1532)

Document ID
UG1532
Release Date
2022-03-30
Revision
1.0 English

The ZCU670 evaluation board supports the VITA 57.4 FPGA mezzanine card plus (FMC+ or FMCP) specification by providing a subset implementation of the high pin count connector at J28 (HSPC). FMC+ connectors use a 14 x 40 form factor, populated with 560 pins. The connector is keyed so that a mezzanine card, when installed on the ZCU670 evaluation board, faces away from the board.

FMCP Connector J28

Samtec SEAF series, 1.27 mm (0.050 in) pitch. Mates with SEAM series connector. More information about SEAF series connectors is available on the Samtec, Inc. website. More information about the VITA 57.4 FMC+ specification is available on the VITA FMC Marketing Alliance website.

The 560-pin FMC+ connector defined by the FMC specification (see VITA57.4 FMCP Connector Pinout) provides connectivity for up to:

  • 160 single-ended or 80 differential user-defined signals
  • 24 transceiver differential pairs
  • 6 transceiver differential clocks
  • 4 differential clocks
  • 239 ground and 19 power connections

FMCP Connector J28

[Figure 1, callout 25]

The HSPC connector J28 implements a subset of the full FMCP connectivity:

  • 68 single-ended or 34 differential user-defined pairs (34 LA pairs: LA[00:33])
  • 8 transceiver differential pairs
  • 2 transceiver differential clocks
  • 2 differential clocks
  • 239 ground and 16 power connections

See the FPGA Mezzanine Card (FMC) VITA 57.4 specification on the VITA FMC Marketing Alliance website for additional information on the FMCP HSPC connector.

The detailed RFSoC connections for the feature described in this section are documented in the ZCU670 board XDC file, referenced in Xilinx Design Constraints.