[Figure 1, callout 3]
The 4 GB, 32-bit wide DDR4 memory system is comprised of four 1 Gb x 8 SDRAM (Micron MT40A1G8SA-075), U96-U99. This memory system is connected to PL-side ZU67DR banks 64 and 65. The DDR4 0.6V PL_DDR4_C0_VTT termination voltage is supplied from TPS51200DRCT sink-source regulator U79.
- Manufacturer: Micron
- Part Number: MT40A1G8SA-075
- Description:
- 8 Gb (1 Gb x 8)
- 1.2V 78-ball FBGA
- DDR4-2666
The ZCU670 ZU67DR RFSoC PL DDR interface performance is documented in the Zynq UltraScale+ RFSoC Data Sheet: DC and AC Switching Characteristics (DS926).
The ZCU670 board DDR4 32-bit component memory interface adheres to the constraints guidelines documented in the PCB guidelines for DDR4 section of UltraScale Architecture PCB Design User Guide (UG583). The ZCU670 DDR4 component interface is a 40Ω impedance implementation. Other memory interface details are also available in the UltraScale Architecture-Based FPGAs Memory IP LogiCORE IP Product Guide (PG150).
For additional details, see the Micron MT40A1G8SA-075 data sheet on the Micron Technology website.
The detailed RFSoC connections for the feature described in this section are documented in the ZCU670 board XDC file, referenced in Xilinx Design Constraints.