PS DDR4 SODIMM Socket

ZCU670 Evaluation Board User Guide (UG1532)

Document ID
UG1532
Release Date
2022-03-30
Revision
1.0 English

[Figure 1, callout 2]

The PS-side memory is wired to the Zynq UltraScale+ RFSoC DDRC Bank 504 hard memory controller. A 64-bit single rank DDR4 SODIMM is inserted into socket J48. The ZCU670 is shipped with a DDR4 SODIMM installed:

  • Manufacturer: Micron
  • Part Number: MTA4ATF51264HZ-2G6E1
  • Description:
    • 4 GByte DDR4 260-Pin SODIMM
    • Single Rank (x 16-bit components)
    • 512 Mb x 64-bit
    • 2666 MT/s

The ZCU670 ZU67DR RFSoC (ZU67DR supports 2400MT/s) PS DDR interface performance is documented in the Zynq UltraScale+ RFSoC Data Sheet: DC and AC Switching Characteristics (DS926).

The ZCU670 DDR4 SODIMM interface adheres to the constraints guidelines documented in the PCB guidelines for DDR4 section of the UltraScale Architecture PCB Design User Guide (UG583). The DDR4 SODIMM interface is a 40Ω impedance implementation. Other memory interface details are also available in the UltraScale Architecture-Based FPGAs Memory IP LogiCORE IP Product Guide (PG150).

For additional details, see the Micron MTA4ATF51264HZ-2G6E1 data sheet on the Micron Technology website.

The detailed RFSoC connections for the feature described in this section are documented in the ZCU670 board XDC file, referenced in Xilinx Design Constraints.