Programmable User SI570 Clocks

ZCU670 Evaluation Board User Guide (UG1532)

Document ID
UG1532
Release Date
2022-03-30
Revision
1.0 English

[Figure 1, callouts 4, 11, and 12]

The ZCU670 board has three I2C programmable SI570 low-jitter 3.3V LVDS differential oscillators, one assigned to the DDR4 component memory interface bank (Bank 65 I/F C0: U47), one assigned to the PS reference clock (Bank 503 U1.M25 PS_REF_CLK), and one assigned to GTY131 (U48).

On power-up, the user clocks default to a pre-programmed output frequency: DDR4 I/F U47 to 300.000 MHz, PS_REF_CLK U130 to 33.333333...MHz (33 + 1/3 MHz), and GTY I/F U48 to 156.250 MHz.

User applications can change the output frequency of each SI570 within the range of 10 MHz to 810 MHz through the I2C1 bus interface. Power cycling the ZCU670 board reverts user clocks to their default settings.

These oscillators can also be reprogrammed from MSP430 system controller U38 (see TI MSP430 System Controller on the Texas Instruments website for more system controller information and the ZCU670 Evaluation Board website for the ZCU670 System Controller GUI Tutorial (XTP698).

DDR4 memory interface C0 (U47) SI570:

  • Programmable oscillator: Skyworks Solutions, Inc. (SiLabs) 570BAB001614DG (10 MHz-810 MHz, 300 MHz default)

  • I2C 0x5D
  • LVDS differential output
  • Total stability: 61.5 ppm

PS reference clock (U130) SI570:

  • Programmable oscillator: Skyworks Solutions, Inc. (SiLabs) SI570JAC000900DGR (10 MHz-160 MHz, 33.333333...MHz (33 + 1/3 MHz) default)
  • I2C 0x5D
  • LVCMOS single-ended output
  • Total stability: 61.5 ppm

GTY SI570:

  • Programmable oscillator: Skyworks Solutions, Inc. (SiLabs) SI570BAB000544DG (10 MHz-810 MHz, 156.250 MHz default)
  • I2C 0x5D
  • LVDS differential output
  • Total stability: 61.5 ppm

The SI5341A and SI570 data sheets can be found on the Silicon Labs website.