[Figure 1, callout 6]
The ZCU670 board uses a Standard Microsystems Corporation USB3320 USB 2.0 ULPI Transceiver (U6) to support a USB connection to the host computer. A USB cable is supplied in the ZCU670 Evaluation Kit (standard-A connector to host computer, USB 3.0 A connector to ZCU670 board connector J18). The USB3320 is a high-speed USB 2.0 PHY supporting the UTMI+ low pin interface (ULPI) interface standard. The ULPI standard defines the interface between the USB controller IP and the PHY device which drives the physical USB bus. Use of the ULPI standard reduces the interface pin count between the USB controller IP and the PHY device.
The following figure shows the USB 3.0 interface. USB 3.0 is host mode only.
The USB3320 is clocked by a 24 MHz crystal (X2). See the Standard Microsystems Corporation USB3320 data sheet for clocking mode details.
The interface to the USB3320 PHY is implemented through the IP in the ZU67DR RFSoC Processor System (PS). USB OTG support is available for USB 2.0. See Table 1 for USB 2.0 jumper settings.
The USB3320 ULPI U6 transceiver circuit (see the following figure) has a Micrel MIC2544 high-side programmable current limit switch (U7). This switch has an open-drain output fault flag on pin 2, which will turn on LED DS7 if overcurrent or thermal shutdown conditions are detected. DS7 is located adjacent to the USB J18 connector (Figure 1, callout 6).
The following figure shows the ULPI U6 transceiver circuit.
The detailed RFSoC connections for the feature described in this section are documented in the ZCU670 board XDC file, referenced in Xilinx Design Constraints.