Defining the HW_Link System Configuration - 2023.1 English

Vitis Unified IDE and Common Command-Line Reference Manual (UG1553)

Document ID
UG1553
Release Date
2023-07-17
Version
2023.1 English

V++ Linker Settings

The Hardware Link (hw_link) configuration file contains information used by the Vitis compiler (v++) for linking the system. To open the config file from the vitis-sys.json file for the System project click the hw_link/binary_container-link.cfg hyperlink. This will open the Config File Editor in the central editor window as displayed below.

Figure 1. Configuring the Hardware Linker Settings

Note: All of the options found in the binary_container-link.cfg are v++ command line options that are documented in the Vitis Application Acceleration Development User Guide (UG1393).

The V++ linker settings provides the following options:

  • Debug: Enable debug file generation. When not enabled the HLS component and the system design can be optimized but will not support debug.
    Note: This specifies the -g option for the v++ --link command as described here. To enable debug for the HLS component you must specify syn.debug.enable in the HLS component config file (hls_config.cfg).
  • Report Level: Specify the level of detail; included in reports generated by the v++ --link command.
  • Hardware optimization: This option specifies the optimization level of the AMD Vivadoâ„¢ implementation results.
  • Export hardware: Specifies that an XSA file should be generated from the linked design produced by the v++ command. This option relates to param=compiler.addOutputTypes=hw_export as described in the v++ --advanced command.
  • Trace memory: When building the hardware target for the System project, this option lets you specify the type and amount of memory to use for capturing trace data. This option relates to the --profile.trace_memory command as described here.

Kernel Data

For each PL kernel in the System project there are additional settings available under the Kernel Data heading.

Figure 2. Configuring Kernel Data

The Kernel Data section refers to config commands that specifically apply to the PL kernels generated from the HLS component, the ports and interfaces, and the debug and profile options available. Many of these options are described under Linking the Kernels in the Vitis Application Acceleration Development User Guide (UG1393).

The specific options that can be set include:

  • CU Name: Lets you define the naming sequence when multiple compute units are generated from a PL kernel as described under the --connectivity.nk option.
  • Compute Units: Specifies the number of compute units to generate from a PL kernel. Also related to --connectivity.nk
  • Memory: Use this option to specify the connection of kernel ports to system ports within the platform. A primary use case for this option is to connect kernel arguments to specific memory resources as described in Mapping Kernel Ports to Memory.
  • SLR Assignment: is described in Assigning Compute Units to SLRs on Alveo Accelerator Cards
  • Protocol Checker: Described under --debug Options in UG1393.
  • Chipscope Debug: Also described under -debug Options.
  • Data Transfer: Enables monitoring of data ports through special monitor IP that are added into the design for profiling. This option relates to the --profile.data command
  • Execute Profiling: This option records the execution times of the kernel and provides minimum port data collection during the system run. This option relates to the --profile.exec command.
  • Stall Profiling: This option relates to the --profile.stall command. It adds stall monitoring logic to the device binary (.xclbin) which requires the addition of stall ports on the kernel interface. Therefore the stall option must be specified during both compilation and linking.
    Important: The --profile.stall command must be specified during compilation of the HLS component using syn.rtl.kernel_profile=1 in the HLS component config file (hls_config.cfg) to be implemented during v++ linking.

Adding Commands Using the Text Editor

After selecting config items using the Config File editor GUI features, you should take a look at the Text Editor view. You can toggle between the GUI table view and the Text Editor view by using the commands in the toolbar.

Examine the configuration file commands that have bean added by the GUI, and be aware of any configuration commands to add to your design that are not presented by the GUI. The Text Editor offers the ability to add configuration commands, whether they are in the GUI or not.

An example of this applies to the use of the AI Engine component in a System project. As described in Linking the System, the AI Engine component must be connected into the platform or to PL kernels using the --connectivity.sc command. You can also map the system port to a memory using the --connectivity.sp command to specify a connection of a GMIO to a specific memory.

Tip: Keep in mind that the GUI does not provide access to all the command options for linking the system. Think about which options your design will need to use. The Text Editor provides a good way to enter them.