The AMD Vitis™ Unified IDE is a design environment for developing applications for AMD Adaptive SoC and FPGA devices. It integrates the functions of Vitis IDE, Vitis HLS and Vitis Analyzer. The unified IDE provides a single tool for end-to-end application development, without the need to jump between multiple tools for design, debug, integration and analysis.
You can perform the following tasks with the Vitis Unified IDE:
- Develop embedded applications that run on processors for Adaptive SoC, including AMD Versal™ and AMD Zynq™ UltraScale+™ MPSoC devices
- Develop AI Engine applications and kernels for Versal Adaptive SoC
- Design programmable logic with C/C++ by creating HLS components
- Develop System projects for AMD Alveo™ Data Center accelerator cards and Adaptive SoC devices
The Vitis Unified IDE provides the following benefits:
- Easy Installation
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- Less pressure on network and hard disk comparing to the Full Edition; Embedded Edition download size reduced from 50 GB to 10 GB and installation size reduced from 166 GB to 15 GB
- Reduced installation dependency requirements: the command line server no longer relies on GUI libraries
Figure 2. Improved Installation
- Architected for ease-of-use
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- The Flow Navigator helps you manage the work flow for different designs
- The design flow supports example template for new users to view all available examples, increasing productivity
- Non-blocking commands can now run multiple build and analysis jobs at the same time
- Design enhancements for the AI Engine work flow
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- Software Emulation runs the host application in x86 mode for faster design iterations as it does not need to launch QEMU with the Linux operating system
- The AI Engine pipeline view is enhanced from single core to multi-core; you can select the pipeline view for any active cores
- The AI Engine microcode view is enhanced with user selectable filters
- Modern look and framework
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- Light and dark themes
- Quick actions with fully customizable shortcut keys
- User-friendly command palette
- Up-to-date C++ syntax highlighting and IntelliSense
Figure 3. Ease-of-Use
- Easier switching between GUI and command-line (CLI) mode
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- Combining strengths of both GUI and CLI
- Configuration files are rendered in real time
- CLI can be used to build projects, and the unified IDE for debugging and analysis
- GUI operations are saved in python log for batch rebuilding
This document guides you through the Vitis tools that embrace a bottom-up design flow for developing
components of a system that are then integrated into a top-level system project. The
tools feature both the Vitis Unified IDE and new
v++ command-line flows for developing AI Engine components, HLS
components, and System projects.
The single unified development environment provides all the features to compile, run, debug, and analyze the different elements of an FPGA-accelerated Data Center application or heterogeneous embedded system design. The Vitis Unified IDE lets you create AI Engine components using the very-long instruction word (VLIW) processor arrays of Versal devices, synthesize C/C++ code into RTL designs using HLS components, run C-simulation and C/RTL Co-simulation, review and analyze build and run summaries in the newly integrated Vitis Analyzer tool.
The new Vitis IDE works with the
new unified command-line features of the v++ and
vitis-run commands. Whether working from the
command-line or from the Vitis IDE, the single
environment provides you a tightly integrated design environment to accomplish most of
your design objectives.
The Vitis Unified IDE is currently in preview mode for data center acceleration and embedded system design, AI Engine and HLS component creation, platform creation, and embedded software design.