To obtain the highest accuracy the PTP protocol requires a network with constant latency. Standards such as PTP boundary clock and PTP transparent clock allow network switches to be PTP aware and measure latencies to allow the PTP end points to compensate for any variance in switching times for PTP packets. However, even with standard non-PTP aware switches, the two stage PTP synchronization approach used by the adapter can provide good accuracy under significant network load.
Xilinx has demonstrated slave to master offsets within 100 ns on a lightly loaded network. However, even under bursty conditions of up to 80% 10G line rate, the same network demonstrated slave to master offsets of within 500 ns. When the bursty condition cleared, the slave to master offsets returned to within 100 ns.
The following figure shows PTP accuracy when used in an environment with bursty network load of up to 80% line rate.