Analog Power Supply and Ground (V CCADC and GNDADC)
These inputs provide the power supply and ground reference for the analog circuitry in the XADC. A common mechanism for the coupling of noise into an analog circuit is from the power supply and ground connections. Excessive noise on the analog supply or ground reference affects the ADC measurement accuracy. For example, I/O switching activity can cause significant disturbance of the digital ground reference plane. Thus, it would not be advisable to use the digital ground as an analog ground reference for XADC.
Similarly, for the digital supplies for the FPGA logic, high switching rates result in high-frequency voltage variations on the supply, even with decoupling. In an effort to mitigate these effects on the ADC performance, a dedicated supply and ground reference is provided. Figure 6-1 illustrates how to use the 1.8V V CCAUX supply to power the analog circuitry. V CCAUX is filtered using a low-pass network. The filter design depends on the ripple and ripple frequency (if any) on the V CCAUX supply if, for example, a switching regulator is used. There is also a power-supply rejection specification for the external reference circuit which needs to be considered. The filtering should ensure no more than 1 LSB (250 uV) of noise on the reference output to minimize any impact on ADC accuracy at 12 bits.
The other source of noise coupling into the ADC is from the ground reference GNDADC. In mixed-signal designs, it is common practice to use a separate analog ground plane for analog circuits to isolate the analog and digital ground return paths to the supply. Common ground impedance is a mechanism for noise coupling and needs to be carefully considered when designing the PCB. This is shown in Figure 2-4, page 21 , where the common ground impedance RG converts digital switching currents into a noise voltage for the analog circuitry. While a separate analog ground plan is recommended for 12-bit operation, it is often not possible or practical to implement a separate analog ground plane in a design. For example, if a user only intends to use the on-chip sensors, one low-cost solution is to isolate V REFN and GNDADC ground references (such as a trace) from the digital ground (plane) using a ferrite bead as shown in Figure 6-1 . This is illustrated in PC Board Design Guidelines .
Notes relevant to Figure 6-1 :
1. Place the 100 nF capacitor as close as possible to the package balls (see PC Board Design Guidelines, page 68 ).
The ferrite bead behaves like a resistor at high frequencies and functions as a lossy inductor. A typical ferrite impedance versus frequency plot is shown in Figure 6-2 . The ferrite helps provide high frequency isolation between digital and analog grounds. The reference IC maintains a 1.25V difference of between V REFP and V REFN . The ferrite offers little resistance to the analog DC return current.
The reference inputs should be routed as a tightly coupled differential pair from the reference IC to the package pins. If routed on the same signal layer, the supply and analog ground traces (V CCADC and GNDADC) should be used to shield the reference inputs because they have a higher tolerance to any coupled noise.
