Introduction and Quick Start

7 Series FPGAs and Zynq-7000 SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User Guide (UG480)

Document ID
UG480
Release Date
2022-06-09
Revision
1.11 English

Chapter 1

Introduction and Quick Start

This chapter provides a brief overview of the Xilinx 7 series FPGAs XADC functionality. The XADC is available in all Artix®-7, Kintex®-7, Virtex®-7, and Zynq®-7000 SoC devices. The XADC is also available in many, but not all Spartan®-7 devices. To identify specific devices that support the XADC block, consult the Spartan-7 family overview in DS180, 7 Series FPGAs Overview [Ref 11] .

The XADC is the basic building block that enables analog mixed signal (AMS) functionality which is new to 7 series FPGAs. By combining high quality analog blocks with the flexibility of programmable logic, it is possible to craft customized analog interfaces for a wide range of applications. See www.xilinx.com/ams for more information.

This chapter contains only key information to allow a basic understanding of the XADC block. With this introduction, you can learn the pinout requirements and determine how to instantiate basic functionality in their designs. Subsequent chapters provide more detailed descriptions of the XADC functionality.