DCI supports the standards shown in Table: All Supported DCI I/O Standards .
To correctly use DCI:
1.VCCO pins must be connected to the appropriate VCCO voltage based on the I/O standards in that I/O bank.
2.Correct DCI I/O buffers must be used in the Vivado Design Suite either by using I/O standard attributes or instantiations in the hardware description language (HDL) code. The Vivado Design Suite automatically restricts the VRP pin from being used as an I/O when a VRP needs to be used as a reference.
3.DCI standards require connecting an external reference resistor to the multipurpose VRP pin. When this is required, that multipurpose pin cannot be used as a general-purpose I/O in the I/O bank using DCI or in the master I/O bank when cascading DCI. See the pinout tables for the specific pin locations. The VRP pin must be pulled to GND by a reference resistor. An exception to this requirement comes when cascading DCI in slave I/O banks because the VRP pin can be used as general-purpose I/O.
4.The value of the external reference resistor is fixed at 240W, terminated to GND.
a.VREF must be compatible for all of the inputs in the same I/O bank or in a group of I/O banks when using DCI cascade.
b.VCCO must be compatible for all of the inputs and outputs in the same I/O bank.
c.Impedances are no longer constrained by RVRP (240W). The DCI state machine calculates the appropriate scaling for controlled impedance drivers, and split and single-termination configurations using OUTPUT_IMPEDANCE and ODT attribute values.