DIFF_HSTL_ II and DIFF_HSTL_II_18

UltraScale Architecture SelectIO Resources User Guide (UG571)

Document ID
UG571
Release Date
2022-08-31
Revision
1.14 English
Table 1-33:      Available I/O Bank Type 

HR

HP

Available

Not Available

Differential HSTL class-II pairs complementary single-ended HSTL_II type drivers with a differential receiver. Differential HSTL can also be used for differential clock and DQS signals in memory interface designs.

Optional untuned split input ODT provides Thevenin equivalent resistance of R (where R = Z0) to the VCCO/2.