HSTL Class II

UltraScale Architecture SelectIO Resources User Guide (UG571)

Document ID
UG571
Release Date
2022-08-31
Revision
1.14 English

This Figure shows a sample circuit illustrating a termination technique for HSTL class-II (1.5V or 1.8V) with unidirectional termination. In a specific circuit, all drivers and receivers must be at the same voltage level (1.5V or 1.8V); they are not interchangeable (i.e., HSTL_II_18 should only interface with HSTL_II_18). Only HR I/O banks support the class-II standards.

Figure 1-60:      HSTL Class II (1.5V or 1.8V) Unidirectional Termination

X-Ref Target - Figure 1-60

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This Figure shows a sample circuit illustrating a termination technique for HSTL class-II (1.5V or 1.8V) with bidirectional termination. In a specific circuit, all drivers and receivers must be at the same voltage level (1.5V or 1.8V); they are not interchangeable (i.e., HSTL_II_18 should only interface with HSTL_II _18).

Figure 1-61:      HSTL Class II (1.5V or 1.8V) Bidirectional Termination

X-Ref Target - Figure 1-61

X16121-hstl-class-ii-1_5v-or-1_8v-bidi-term.jpg