HSTL_ I_DCI, HSTL_I_DCI_12, and HSTL_ I_DCI_18

UltraScale Architecture SelectIO Resources User Guide (UG571)

Document ID
UG571
Release Date
2022-08-31
Revision
1.14 English
Table 1-29:      Available I/O Bank Type 

HR

HP

N/A

Available (HSTL_I_DCI_12 in
UltraScale devices only)

In UltraScale and UltraScale+ devices, HSTL_I_DCI and HSTL_I_DCI_18 provide on-chip split-Thevenin termination powered from VCCO, using the ODT attribute, creating an equivalent parallel-termination voltage (VTT) of VCCO/2. HSTL_I_DCI_12 provides on-chip split-Thevenin termination in UltraScale devices. HSTL_I_DCI_12 does not provide input split termination in UltraScale+ devices. STL12_DCI provides equivalent functionality.

The source termination feature (OUTPUT_IMPEDANCE) provides the option of 40W, 48W, or 60W of tuned driver impedance in HP I/O banks. The default value of the driver output impedance is 48W.