POD

UltraScale Architecture SelectIO Resources User Guide (UG571)

Document ID
UG571
Release Date
2022-08-31
Revision
1.14 English

This Figure shows a sample circuit illustrating a unidirectional board topology for POD (1.0V or 1.2V) with matched driver and receiver termination values. Only HP I/O banks support these standards.

Figure 1-77:      POD with Unidirectional Signaling

X-Ref Target - Figure 1-77

X16137-pod-w-uni-signaling.jpg

This Figure shows a sample circuit illustrating a termination technique for POD (1.0V or 1.2V) with bidirectional termination and with matched driver and receiver termination values. In a specific circuit, all drivers and receivers must be at the same voltage level (1.0V or 1.2V); they are not interchangeable (i.e., POD12 should only interface with POD12).

Figure 1-78:      POD with Bidirectional Signaling

X-Ref Target - Figure 1-78

X16138-pod-w-bidi-signaling.jpg