SSTL15, SSTL135, SSTL12, DIFF_SSTL15, DIFF_SSTL135, DIFF_SSTL12

UltraScale Architecture SelectIO Resources User Guide (UG571)

Document ID
UG571
Release Date
2022-08-31
Revision
1.14 English
Table 1-42:      Available I/O Bank Type 

HR

HP

Available

Available

Parallel end-termination resistors (commonly 50W) to VTT = (VCCO/2) are typically placed on the board close to any receiver. Depending on the board topology, source-termination series resistors help match the output driver impedance to the transmission line and end-termination impedances, to reduce reflections and improve signal integrity. Optional untuned split input ODT provides Thevenin equivalent resistance of R (where R = Z0) to the VCCO/2. Untuned on-die source termination feature (OUTPUT_IMPEDANCE) provides the option of 40W, 48W, or 60W of driver impedance in HP I/O banks. The driver output impedance is set to a default of 40W. The differential (DIFF_) versions use complementary single-ended drivers for outputs, and differential receivers for inputs.