Special DCI Requirements in Some Banks

UltraScale Architecture SelectIO Resources User Guide (UG571)

Document ID
UG571
Release Date
2022-08-31
Revision
1.14 English

When any of the multi-function pins in I/O bank 65 (or pins in bank 60 or bank 70 in devices with multiple SLRs) are assigned as DCI I/O standards (in HP I/O bank devices), you should also include and use the DCIRESET primitive in your design. In that case, the design should pulse the RST input of DCIRESET and then wait for the LOCKED signal to be asserted prior to using any of these pins’ inputs or outputs with DCI standards. This is required because these I/O pins ignore the initial DCI calibration that happens during the normal device initialization.

As a result, if the DCIRESET primitive had not been used and DCIUpdateMode was set to ASREQUIRED, after those pins become normal I/O pins, there would be an indeterministic delay between the end of configuration and when the DCI calibration algorithm updated those pins’ DCI settings. If DCIRESET was not used and DCIUpdateMode was set to QUIET, these pins would never have their DCI values set. Including and using the DCIRESET primitive in the design allows these pins to have DCI I/O standards and to perform without issue.