Split-Termination DCI (Thevenin Equivalent Termination to VCCO/2)

UltraScale Architecture SelectIO Resources User Guide (UG571)

Document ID
UG571
Release Date
2022-08-31
Revision
1.14 English

Some I/O standards (HSTL and SSTL) require an input termination resistance (R) to a VTT voltage of VCCO/2 (see This Figure).

Figure 1-10:      Input Termination to VCCO / 2 without DCI (where R = Z0)

X-Ref Target - Figure 1-10

X16068-input-term-to-vcco_2-without-dci-where-r-is-z0.jpg

Split-termination DCI creates a Thevenin equivalent circuit using two resistors of twice the resistance value (2R). One terminates to VCCO, the other to GND. Split-termination DCI provides an equivalent termination to VCCO/2 using this method. The 2R termination resistance is set by programming the ODT attribute. The resistors to VCCO and GND are equal to twice the value set by ODT. For example, to achieve the Thevenin equivalent parallel-termination circuit of approximately 50W to VCCO/2, a 240W external precision resistor is required at the VRP pin and ODT is set to RTT_48. Possible values for ODT for split-termination DCI are RTT_40, RTT_48, or RTT_60.

The DCI input standards supporting split termination are shown in Table: All DCI I/O Standards Supporting Split-Termination DCI .

Table 1-3:      All DCI I/O Standards Supporting Split-Termination DCI 

HSTL_I_DCI

DIFF_HSTL_I_DCI

SSTL18_I_DCI

DIFF_SSTL18_I_DCI

HSTL_I_DCI_18

DIFF_HSTL_I_DCI_18

SSTL15_DCI

DIFF_SSTL15_DCI

HSTL_I_DCI_12

(UltraScale devices only)

DIFF_HSTL_I_DCI_12

(UltraScale devices only)

SSTL135_DCI

DIFF_SSTL135_DCI

 

 

SSTL12_DCI

DIFF_SSTL12_DCI

This Figure illustrates split-termination DCI.

Figure 1-11:      Input Termination to VCCO / 2 Using Split-Termination DCI (where R = Z0)

X-Ref Target - Figure 1-11

X16069-input-term-to-vcco_2-using-split-term-dci-where-r-is-z0.jpg