T_DCI Design Migration Guidelines

UltraScale Architecture SelectIO Resources User Guide (UG571)

Document ID
UG571
Release Date
2022-08-31
Revision
1.14 English

The Xilinx 7 series architecture supported T_DCI standards for bidirectional I/O configurations with 3-state support for internal input split-termination. Those T_DCI standards are not supported in UltraScale devices. However, many of the UltraScale architecture DCI standards are capable of supporting similar bidirectional configurations. Table: T_DCI I/O Standards for Migration between Xilinx Device Architectures  lists the T_DCI standards that are transparently ported or migrated to an equivalent UltraScale architecture standard when designing with the Vivado® Design Suite.

Table 1-5:      T_DCI I/O Standards for Migration between Xilinx Device Architectures 

7 Series Architecture I/O Standard

UltraScale Architecture Equivalent I/O Standard

DIFF_SSTL15_T_DCI

DIFF_SSTL15_DCI

DIFF_SSTL135_T_DCI

DIFF_SSTL135_DCI

DIFF_SSTL12_T_DCI

DIFF_SSTL12_DCI

SSTL15_T_DCI

SSTL15_DCI

SSTL135_T_DCI

SSTL135_DCI

SSTL12_T_DCI

SSTL12_DCI