PSDONE – Phase Shift Done

UltraScale Architecture Clocking Resources User Guide (UG572)

Document ID
UG572
Release Date
2023-02-01
Revision
1.10.2 English

The phase shift done output signal is synchronous to the PSCLK. When the current phase shift operation is completed, the PSDONE signal is asserted for one clock cycle indicating that a new phase shift cycle can be initiated.