For UltraScale and UltraScale+ FPGAs in the -3, -2, or -1 speed grades, it is required to connect VCCINT_IO to VCCINT and VCCBRAM. However, for UltraScale+ -2L and -1L FPGAs, it is required to connect VCCINT_IO to VCCBRAM.
To support this requirement, the system shown in Table: VCCINT/VCCINT_IO/VCCBRAM Connection Matrix is recommended in conjunction with This Figure. The VCCBRAM plane must be sized appropriately to support the additional load for VCCINT_IO when using -2L or -1L devices.
It is possible to connect VCCINT, VCCINT_IO, and VCCBRAM together when using -2 or -1 devices because the respective voltages are the same. It is also possible to connect VCCINT, VCCINT_IO, and VCCBRAM together when using -2L or -1L devices if VCCINT is always operated at 0.85V.