In a small number of cases, an HR bank in one device might become an HP bank in an otherwise footprint-compatible package, and vice-versa. If migration is desired at the initial design stage, it is advisable to use only 1.8V I/O standards so that any move from HR to HP banks is not affected. If this is not possible, avoid HR banks that can become HP banks. Refer to the I/O Bank Migration table in UltraScale and UltraScale+ FPGAs Packaging and Pinouts Product Specification (UG575) [Ref 9] to determine which banks could be affected, or refer to Table: Interchanged HP and HR Banks.
In addition, there are functional differences between HP and HR I/Os, such as whether DCI is available (HP only) and I/O standard availability. Refer to the Supported Features in the HR and HP I/O Banks table in UltraScale Architecture SelectIO Resources User Guide (UG571) [Ref 10] to determine the capabilities and I/O standards available with each type of I/O.
When it is not possible to avoid migrating from an HR bank to an HP bank, the new HP I/Os might need to be level translated due to their maximum 1.8V output. Refer to Interfacing 7 Series FPGAs High-Performance I/O Banks with 2.5V and 3.3V I/O Standards (XAPP520) [Ref 11], which gives many methodologies for interfacing HP I/Os with higher voltage I/Os.