ADC and DAC Voltage Supply Specifications

UltraScale Architecture PCB Design User Guide (UG583)

Document ID
UG583
Release Date
2023-11-14
Revision
1.27 English

The ADC and DAC voltage supply specifications for Gen 1, Gen 2, and Gen 3 devices are listed in Table: ADC and DAC Voltage Supply Specifications for Gen 1 and Gen 2 Devices(1) and Table: ADC and DAC Voltage Supply Specifications for Gen 3 Devices(1).

Table 3-6:      ADC and DAC Voltage Supply Specifications for Gen 1 and Gen 2 Devices(1)

Supply

Nominal Voltage (V)

Tolerance (%)(2)

Frequency Range (MHz)

Maximum Supply Ripple (mVpp)(3)

ADC_AVCC

0.925

±3

0.1–15

0.25

ADC_AVCCAUX

1.8

±3

0.1–15

11.03

DAC_AVCC

0.925

±3

0.1–15

0.40

DAC_AVCCAUX

1.8

±3

0.1–15

2.00

DAC_AVTT

2.5/3.0(4)

±3

0.1–15

8.94

VCCINT_AMS

0.85

±3

0.1–15

20.00

Notes:

1.For the maximum current, refer to the Xilinx Power Estimator (XPE) tool.

2.The tolerance percentage is for the switching regulator that feeds the VRM.

3.Output of the VRM.

4.DAC_AVTT should be set to 2.5V if used in 20 mA mode, and 3.0V if used in 32 mA mode in Gen 1 and Gen 2. AMD recommends DAC_AVTT be set to 3.0V in Gen 3 to enable the VOP function. Refer to Zynq UltraScale+ RFSoC RF Data Converter LogiCORE IP Product Guide (PG269) [Ref 17] for details and compatibility mode.

Table 3-7:      ADC and DAC Voltage Supply Specifications for Gen 3 Devices(1)

Supply

Nominal Voltage (V)

Tolerance (%)(2)

Frequency Range (MHz)

Maximum Supply Ripple (mVpp)(3)

ADC_AVCC

0.925 (1.01V DFE)

±3

0.1–15

0.25

ADC_AVCCAUX

1.8

±3

0.1–15

1.2

DAC_AVCC

0.925

±3

0.1–15

0.32

DAC_AVCCAUX

1.8

±3

0.1–15

1.0

DAC_AVTT

2.5/3.0(4)

±3

0.1–15

2.0

VCCINT_AMS

0.85

±3

0.1–15

20.0

Notes:

1.For the maximum current, refer to the Xilinx Power Estimator (XPE) tool.

2.The tolerance percentage is for the switching regulator that feeds the VRM.

3.Output of the VRM.

4.DAC_AVTT should be set to 2.5V if used in 20 mA mode, and 3.0V if used in 32 mA mode in Gen 1 and Gen 2. AMD recommends DAC_AVTT be set to 3.0V in Gen 3 to enable the VOP function. Refer to Zynq UltraScale+ RFSoC RF Data Converter LogiCORE IP Product Guide (PG269) [Ref 17] for details and compatibility mode.