Adjusting for Different Stack-Ups

UltraScale Architecture PCB Design User Guide (UG583)

Document ID
UG583
Release Date
2023-11-14
Revision
1.27 English

The trace width, spacing, length, and skew constraints presented in this chapter are based on the reference stackup shown in Table: Reference Stackup. When not using this stackup, trace width, lengths, layer heights, spacings, and dielectric material could need adjustments to meet the impedance, length, and skew specifications.

The PCB fabrication house can adjust these factors to achieve the desired impedance and propagation delay targets. The effects of each of these items are listed in this section. In addition, a two-dimensional field solver utility allows for various combinations to be tested.