BGA Package

UltraScale Architecture PCB Design User Guide (UG583)

Document ID
UG583
Release Date
2023-11-14
Revision
1.27 English

Each signal path within the BGA package is carefully designed to optimize signal integrity. Traces supporting single-ended I/O are nominally designed for 50W trace impedance. Traces supporting high-speed SerDes I/O are designed for nominally 100W differential impedance. Special care is taken in the design of signal paths to optimize discontinuities such as solder balls and substrate vias to minimize their effect on signal integrity. A 3D full-wave electromagnetic solver and a vector network analyzer are used to model and measure package performance.