A balun is typically used to interface to the differential input/output of the data converter for converting to a single-ended signal. The bandwidth of the chosen balun should be greater than the band of interest for the user application. This ensures that the measured RFSoC bandwidth is not limited by the balun bandwidth. Refer to Zynq UltraScale+ RFSoC Data Sheet: DC and AC Switching Characteristics (DS926) [Ref 5] for exact values in the bandwidth column based on different generations.
The Zynq\ UltraScale+\ RFSoC is designed to ensure that all the data converter inputs and outputs along with the clock inputs see a 100W DC resistance under normal operating conditions. The purpose of the balun is to convert the single-ended signal with a typical characteristic impedance of 50W/75W to a differential 100W system to meet the RFSoC requirements. Customers can either opt for a wire-bound or a stripline balun depending on the application requirements. The wire-bound baluns are generally used to generate differential signals for low-frequency applications on the order of hundreds of kHz to hundreds of MHz while the RF stripline baluns are more suited for GHz applications. The RF stripline baluns tend to exhibit a band-pass filter characteristic and thus care should be taken to pick a balun with the correct bandwidth requirements that matches the application requirements.
Customers should pay close attention to the balun specification recommendations in Table: over the application bandwidth of interest when picking a balun. Several parts that can be considered are:
•Anaren BD1631J50100AHF (approximate bandwidth 1.4 GHz – 3.5 GHz)
•Anaren BD3150L50100AHF (approximate bandwidth 3.1 GHz – 6 GHz)
•Mini Circuits TCM2-33X+ (approximate bandwidth 10 MHz – 1.4 GHz)
•Mini Circuits TC1-1-13M-75X (cable applications)
|
Specification |
Typical Result |
|---|---|
|
Impedance ratio |
2 or 1 |
|
Bandwidth |
Application specific |
|
Insertion loss |
–1 dB or better |
|
Return loss |
–15 dB or better |
|
Common-mode rejection ratio (CMRR) |
>30 dB(1) |
|
Amplitude imbalance |
<~0.5 dB |
|
Phase imbalance |
<~1.5° |
|
Notes: 1.CMRR can be relaxed if the system is designed to avoid second harmonic distortion (HD2) by frequency planning. |
|
The RF signal chain for each DAC and ADC, which consists of differential DC blocks, differential Pi attenuators (recommended for Gen1/Gen2 only), baluns, and filters, fits well on a 4 mm pitch including the RF shields which cover the RF signal chain components. The RF shield should be electrically attached to ground vias in the PCB at 3 mm spacing (same spacing as the guard stitching vias for signal traces). Failure to adhere to this recommendation results in violating crosstalk guidelines. While the attachment pitch is nominally 3 mm, each attachment point is allowed a tolerance of ±1 mm from its nominal position. To help facilitate attaching the RF shields to the PCB in a tight space, AMD recommends coating the inside surface of the shield with liquid photo-imageable (LPI) solder mask. This avoids potential shorting to components located inside the RF shield. If soldering the RF shield to the PCB, AMD recommends plating the shield with either bright tin, solder plating, or other plating material that can bond to the solder. The ground vias to which the RF shield attaches should be through-hole vias connected to all inner ground plane layers. An example of this layout can be seen in This Figure.
