Example Two: VU190 to VU13P in A2577 Package

UltraScale Architecture PCB Design User Guide (UG583)

Document ID
UG583
Release Date
2023-11-14
Revision
1.27 English

This Figure shows a die-level floorplan for a design utilizing the VU190 device in the A2577 package. This design is similar to the design in Example One: VU125 to VU7P in C2104 Package in that it includes several memory interfaces, a 100G Ethernet interface, an Interlaken 12x12.5G interface, and a Tandem PCIe interface.

Figure 7-5:      Example VU190 Design Floorplan

X-Ref Target - Figure 7-5

ug583_c7_05.jpg

This Figure shows how this design could migrate into a VU13P device. Careful bank selections for the various interfaces are necessary due to the notable differences in the device floorplans. The key differences in the device floorplans are such that there are more available banks in the VU13P, the SLRs cross different bank boundaries, and the block locations are noticeably different in the two devices relative to their neighboring banks.

Figure 7-6:      VU13P Floorplan for Migration from VU190

X-Ref Target - Figure 7-6

ug583_c7_06.jpg