As mentioned earlier in this section, many applications need to enter ultra-low power, reduced functional states to maximize battery life or reduce overall power consumption. To facilitate this, Zynq UltraScale+ MPSoCs have four independent power domains: LPD, FPD, PLPD, and BPD. To enable the power associated with each of these domains to go to zero when unused, the power rails associated with each domain need to be separated, either via independent power regulators or via load switches.
Table: Full Power Management Flexibility Rail Consolidation broadly defines the power rail consolidation that is possible for this use case, assuming the decoupling and filtering requirements on the individual supplies as outlined in this document are met. For further clarity, This Figure shows the possible power rail consolidation graphically. As shown in Table: Full Power Management Flexibility Rail Consolidation, the minimum number of power regulators required to power a Zynq UltraScale+ MPSoC in this use case is nine. Alternatively, to achieve the same isolation, a combination of power regulator and load switch could be used, reducing the overall number of power regulators required.
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|
Power Regulator |
Sequence |
Possible Power Rail Consolidation |
|---|---|---|---|
|
Required |
1 |
See Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics (DS925) [Ref 22] |
VCC_PSINTLP |
|
2 |
VCC_PSAUX and VCC_PSADC(1) |
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|
3 |
VCC_PSPLL |
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|
4 |
VCCO_PSIO[0:3] assuming run off same voltage |
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|
5 |
VCC_PSINTFP and VCC_PSINTFP_DDR |
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|
6 |
VCC_PSDDR_PLL |
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|
7 |
VCCO_PSDDR |
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|
8 |
VCCINT(2), VCCBRAM, and VCCINT_IO |
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|
9 |
VCCAUX, VCCAUX_IO, VCCADC(1) |
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|
Required EV devices |
15 |
VCCINT_VCU |
|
|
User-defined |
10 |
VPS_MGTRAVCC |
|
|
11 |
VPS_MGTRAVTT |
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|
12 |
VMGTAVTT (GTH) and VMGTAVTT (GTY) |
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13 |
VMGTAVCC (GTH) and VMGTAVCC (GTY) |
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|
14 |
VMGTVCCAUX (GTH) and VMGTVCCAUX (GTY) |
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|
16 |
Optional PL and PS I/O voltages |
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Notes: 1.Assuming rail is filtered as per UltraScale Architecture System Monitor User Guide (UG580) [Ref 25]. 2.Additional voltage regulator required for -2LI or -2LE devices where user wants to run VCCINT = 0.72V. |
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Note: In This Figure, the dashed lines are dependent on the user configuration. Identical voltages between I/O supplies and digital supplies can be combined if operating at the same voltage. This might alter the power sequence, moving the I/O supply up to the sequence slot of the rail it is combined with.
Table: Number of Power Rails for Typical Configurations for Application Requiring Full Power Domain Flexibility shows the number of regulators for common configurations of Zynq UltraScale+ MPSoC used in this use case. For applications that use -1LI or -2L devices, where the user wants to run VCCINT at 0.72V, an additional voltage regulator is required relative to Table: Number of Power Rails for Typical Configurations for Application Requiring Full Power Domain Flexibility. An additional regulator is required for VCCINT_VCU when using an EV device.
1. If there are an unusually large number of vias or other keepouts within the plane, a wider plane might need to be drawn to reduce resistive losses and to maintain the ability to provide at least 3A of current.