Layer 5 in BGA Area for DACs/ADCs

UltraScale Architecture PCB Design User Guide (UG583)
Document ID
UG583
Release Date
2023-11-14
Revision
1.27 English
Figure 3-24:      Layer 5 in BGA Area for DACs/ADCs

X-Ref Target - Figure 3-24

X22702-Layer_5_in_BGA_Area_for_DACs_and_ADCs.jpg

Here, land pads for all grounds are 18 mils. Remove all unused signal pads.