PS Reset (External System Reset and POR Reset)

UltraScale Architecture PCB Design User Guide (UG583)

Document ID

UG583

Release Date

2023-11-14

Revision

1.27 English

•Connect PS_SRST_B to a 4.7 kW pull-up resistor to VCCO_PSIO[3] near the Zynq UltraScale+ MPSoC.

•Connect PS_POR_B to a 4.7 kW pull-up resistor to VCCO_PSIO[3] near the Zynq UltraScale+ MPSoC.

•Refer to the “Power Supply Sequencing” section in Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics (DS925) [Ref 22] for rules regarding PS_POR_B during the power-on sequence.