•Connect PS_INIT_B to a 4.7 kW pull-up resistor to VCCO_PSIO[3].
°PS_INIT_B is open drain and should not be driven during logic built-in self test (LBIST).
•Connect PS_PROG_B to a 4.7 kW pull-up resistor to VCCO_PSIO[3].
°PS_PROG_B is open drain and should not be driven during LBIST.
•Connect PS_DONE to a 4.7 kW pull-up resistor to VCCO_PSIO[3].
IMPORTANT: PS_PROG_B is recommended to be independent of PS_POR_B. See Zynq UltraScale+ MPSoC Technical Reference Manual (UG1085) [Ref 23] for details regarding PS_PROG_B and PS_POR_B.
IMPORTANT: It is recommended to limit the external loading on PS_INIT_B so as not to excessively delay its rise time (see Answer Record 70504).