The guidelines in this document are based on the following use case assumptions.
•80% of CLB LUTs and registers running at 245 MHz
•80% of block RAMs running at 491 MHz
•80% of UltraRAMs running at 200 MHz
•80% of DSPs running at 491 MHz
•100% of MMCM and PLL running at 500 MHz
•100% of GTY transceiver usage
•8.02A step-load current on VCCSDFEC