QDR II+ SRAM Address and Command Fly-by Routing and Termination

UltraScale Architecture PCB Design User Guide (UG583)

Document ID

UG583

Release Date

2023-11-14

Revision

1.27 English

Fly-by topology is used for address and command signals to achieve the best signal integrity (This Figure).

Figure 2-71: Address and Command Fly-by Routing and Termination for QDR II+ SRAM
X-Ref Target - Figure 2-71

This Figure shows the QDR II+ SRAM address and command point-to-point routing and termination.

Figure 2-72: Address and Command Point-to-Point Routing and Termination for QDR II+ SRAM
X-Ref Target - Figure 2-72

Table: QDR II+ SRAM Impedance, Length, and Spacing Guidelines for Address and Command Signals shows the QDR II+ SRAM impedance, length, and spacing guidelines for address and command signals.

Table 2-82: QDR II+ SRAM Impedance, Length, and Spacing Guidelines for Address and
Command Signals
Parameter	L0 (Device Breakout)	L1 (Main PCB)	L2 (SRAM Breakout)	L3 (Main)	L4 (To R_TT)	Units
Trace type	Stripline	Stripline	Stripline	Stripline	Stripline	–
Single-ended impedance Z₀	50±10%	39±10%	50±10%	50±10%	36±10%	W
Trace width	4.0	6.0	4.0	4.0	7.0	mil
Trace length	0.0~0.8/1.2⁽¹⁾	0.0~3.0	0.0~0.3	0.5~0.8	0.0~0.4	inches
Spacing in address, command, and control signals (minimum)	4.0	8.0	4.0	8.0	8.0	mil
Spacing to clock signals (minimum)	8.0	20	8.0	20	20	mil
Spacing to other group signals (minimum)	8.0	30	30	30	30	mil
Maximum PCB via count	4					–
Notes: 1.See item 2 in General Memory Routing Guidelines.