The recommended decoupling capacitor quantities for commercial grade (XC) devices are shown in Appendix A. Recommended quantities for automotive grade (XA) devices are shown in Appendix B. Recommended quantities for defense grade (XQ) devices are shown in Appendix C. The optimized quantities of PCB decoupling capacitors assume that the voltage regulators have stable output voltages and meet the regulator manufacturer's minimum output capacitance requirements.
The assumptions used for the decoupling quantities are shown below. If any of those assumptions significantly differ from the actual design, simulations are recommended to determine the actual amount of required capacitance, which could be higher or lower. The decoupling recommendations are designed for optimal performance between roughly 100 kHz and 10–20 MHz.
Because device capacitance requirements vary with CLB and I/O utilization, PCB decoupling guidelines are provided on a per-device basis based on very high utilization so as to cover a majority of use cases. Resource usage consists (in part) of:
•80% of LUTs and registers at 245 MHz and 25% toggle rate
•80% block RAM and DSP at 491 MHz and 50% toggle rate
•50% MMCM and 25% PLL at 500 MHz
•25% I/O at SSTL 1.2/1.35 at 1200 MHz and 40% toggle rate
•75% I/O at POD 1.2 at 1200 MHz DDR and 40% toggle rate
An importable XPE template .xpe file that contains the above usage assumptions in a KU9P FFVE900 device can be downloaded from the Xilinx website.