For applications that require AC coupling between transmitter and receiver, SMT pads are introduced in the channel to allow coupling capacitors to be mounted. Standard SMT pads have excess capacitance due to plate capacitance to a nearby reference plane. In the This Figure example, a 5 mil trace with a Z0 of 50W transitions to an 0402 SMT pad that is 28 mils wide, all over 3 mils of FR4.
Using a 2D field solver on these dimensions yields a Z0 of 50W for the 5 mil trace. The Z0 for the 0402 pad is 16W because the pad has too much capacitance and too little inductance, resulting in an impedance of less than 50W. Performance of this transition can be optimized in one of two ways.
The first method makes the trace the same width as the pad and moves the ground plane deeper into the stackup to maintain the Z0 of the transition at 50W. This method does not require any special analysis, but there might be some error due to the fringing capacitance of the SMT capacitor body. Trace density is limited because traces are now 28 mils wide.
The second method, shown in This Figure, clears the ground plane underneath the pad, which removes much of the excess capacitance caused by the plate capacitance between the pad and the ground plane. This technique allows for greater trace density than the first method, but requires 3D field-solver analysis or measurement along with several board iterations to get the desired performance.
The 2D field-solver example shows that close to 50W can be achieved if the ground plane under the pad footprint is cleared out. A 3D field solver is then used to verify this result to a greater degree of accuracy.
This Figure shows the ground plane cleared away exactly as it was for the 2D simulation. Using frequency domain analysis within HFSS, there is a 20 dB (10x) improvement in return loss using this technique.
This Figure shows the return loss comparison between 0402 pad structures with linear scale.
The approximately –40 dB/decade slope in This Figure shows good fit to the frequency response of a lumped capacitor.
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Next, using simulated measurements on the same transition modeled in HFSS, the time-domain performance of this transition can be measured by doing a TDR on the S-parameter results from the earlier frequency domain analysis.
In This Figure and This Figure, the red curve with the large capacitive dip corresponds to the SMT pad without the ground plane cleared from underneath. The blue curve shows that clearing out the ground plane removes much of the excess capacitance. This improvement can be quantified using Equation 12-1 and Equation 12-2.
As shown from This Figure and This Figure, clearing the ground plane under SMT pads yields a significant improvement in the performance of an SMT pad transition. Excess capacitance is reduced by 15x, and return loss is improved by 20 dB.
