To make TDR measurements, a step input is applied to the interconnect. The location and magnitude of the excess capacitance or inductance that the voltage step experiences as it traverses the interconnect can be determined through observing the reflected signal.
A shunt capacitance (see This Figure) causes a momentary dip in the impedance, while a series inductance (see This Figure) causes an impedance discontinuity in the opposite direction. Td is the propagation delay through the first transmission line segment on the left. The reflected wave due to the impedance discontinuity takes 2 * Td to return to the TDR port. If the signal propagation speed through the transmission line is known, the location of the excess capacitance or inductance along the channel can be calculated.
The magnitude of this excess capacitance (C) or inductance (L) can also be extracted from the TDR waveform by integrating the normalized area of the transition’s TDR response. The respective equations for capacitance and inductance are:
This Figure shows the integration of the normalized TDR area.
The results using these equations are not sensitive to rise time variation and are valid for simulated TDR measurements provided that the leading and trailing transmission lines are very close to 50W. However, for actual measurements, accuracy is very dependent on Z0.