Trace Characteristic Impedance Design for High-Speed Transceivers

Because the transceivers use differential signaling, the most useful trace configurations are differential edge-coupled stripline and differential microstrip. While some backplanes use the differential broadside-coupled stripline configuration, it is not recommended for 10 Gb/s operation, because the P and N vias are asymmetrical and introduce common-mode non-idealities.

With few exceptions, 50W characteristic impedance (Z₀) is used for transmission lines in the channel. In general, when the width/spacing (W/S) ratio is greater than 0.4 (8 mil wide traces with 20 mil separation), coupling between the P and N signals affects the trace impedance. In this case, the differential traces must be designed to have an odd mode impedance (Z_0O) of 50W, resulting in a differential impedance (Z_DIFF) of 100W, because Z_DIFF = 2 x Z_0O.

The same W/S ratio also must be less than 0.8, otherwise strong coupling between the traces requires narrower, lossier traces for a Z_0O of 50W. To clarify, with Z_0O at 50W, an even mode impedance (Z_0E) of 60W or below is desired.

This Figure through This Figure show example cross sections of differential structures.

A good PCB manufacturer understands controlled impedance and allows fine adjustments for line widths to produce a Z_0O of 50W . The PCB manufacturer also provides the parameters necessary for the specific PCB layout. Some parameters can be calculated or simulated from the guideline outlined in the example. Although ±10% tolerance on Z_0O is typical and can provide adequate performance, the additional cost of a tighter tolerance results in better channel performance.