Unidirectional Point-to-Point Topographies

The simplest unidirectional topography is point-to-point. That is, there is one driver and one receiver. Termination, if present, can consist of parallel termination at the receiver (This Figure), series termination at the driver (This Figure), or a controlled-impedance driver (This Figure and This Figure). Always use IBIS simulation to determine the optimal resistor values, V_TT voltage level, and VRP reference resistors for these terminations.

In general, parallel resistive termination (R_P) has a value equal to the characteristic impedance (Z₀) of the transmission line it is terminating. Series resistive terminations (R_S) have a value equal to the characteristic impedance of the transmission line (Z₀) minus the output impedance of the driver (R_O) to which they are connected. Controlled-impedance drivers are tuned such that the driver output impedance (R_O) is equal to the characteristic impedance (Z₀) of the transmission line it is terminating.

Assuming transmission lines with 50W characteristic impedance and a driver output impedance (R_O) of 25W, a 25W series termination (This Figure) or a 50W parallel termination (This Figure) is appropriate. Controlled-impedance drivers, whether implemented with DCI or with weak LVCMOS drivers, should be sized to have an output impedance (R_O) of 50W. This corresponds to a VRP resistor equal to 50W for DCI. Weak LVCMOS drivers of 6 mA to 8 mA drive strength have an output impedance approximately equal to 50W (This Figure).

Typically, parallel terminations have best performance when V_TT (the voltage source connected to the parallel termination resistor) is equal to half of the signaling voltage. For 2.5V signals (V_CCO = 2.5V), V_TT is ideally 1.25V. In cases where this voltage is not available, it is possible to use a Thevenin parallel termination. Thevenin parallel termination consists of a voltage divider with a parallel equivalent resistance (R_PEQ) equal to the characteristic impedance of the transmission line (50W in most cases). The divided voltage point is designed to be at V_TT. This Figure illustrates a Thevenin parallel termination powered from 2.5V V_CCO, made up of two 100W resistors, resulting in a V_TT of 1.25V and a parallel equivalent resistance (R_PEQ) of 50W.

Parallel termination can be less desirable than series termination or controlled-impedance drivers because it dissipates more power. This trade-off must be weighed against other trade-offs to determine the optimum termination topography for an interface.

Table: Example I/O Interface Type for Unidirectional Point-to-Point Topographies lists example I/O interface types that can be used with the unidirectional point-to-point topography.

LVTTL and LVCMOS do not specify any canonical termination method. Series termination at the driver or parallel termination at the receiver are both appropriate considerations.

LVDCI implicitly uses controlled-impedance driver termination. No form of termination is needed at the receiver.

Every I/O standard can have different requirements for termination techniques. In some cases the specification for the I/O standard can rigidly define the termination topology. Other standards might not have any hard requirements, but rather might simply provide examples of termination topologies. An example of a standard with specific termination requirements is HSTL. HSTL Class I is a unidirectional I/O standard that recommends a parallel termination at the receiver. In the case of HSTL Class I, the termination voltage V_TT is defined as half of the supply voltage V_CC. The designer can ultimately elect either not to use termination at all or to use a different termination, such as series termination at the driver. There are a number of reasons why this selection might be advantageous in a given system. It is up to the designer to verify through simulation and measurement that the signal integrity at the receiver is adequate.

The SSTL standards tend to not have rigid requirements for termination topology. Rather, the JEDEC specifications provide example termination techniques that tend to be the commonly used topographies. The SelectIO Resources chapter of the UltraScale Architecture SelectIO Resources User Guide (UG571) [Ref 10] provides example termination techniques for each of the I/O standards, including the SSTL standards, for the purpose of providing a good starting point for consideration. Similar to HSTL, it is ultimately up to the designer to verify through simulation and measurement that the signal integrity at the receiver is adequate.