VCCINT_VCU Plane Design and Power Delivery

The V_{CCINT_VCU} plane(s) or planelet(s) should be wide enough to accommodate up to the required amount of current (per XPE) at their narrowest points, factoring in all width reductions due to vias and other keepouts. However, planes and planelets need to be drawn even wider to reduce resistive losses between the regulator and the BGA pins. While properly routed sense lines offer assistance in offsetting resistive losses, regulator efficiency is maximized when resistive loss is minimized. For these reasons, AMD recommends drawing V_{CCINT_VCU} planes at
500–800 mil ⁽¹⁾ width while outside of the BGA region, and 400 mils under the BGA before the plane gradually narrows to the V_{CCINT_VCU} pins. This Figure shows an example V_{CCINT_VCU} plane layout.

In addition, AMD recommends placing a ground plane directly above or below the plane that contains V_{CCINT_VCU} to reduce inductance.