Revision History - 2023.2 English

Vivado Design Suite User Guide: Design Flows Overview (UG892)

Document ID
UG892
Release Date
2023-10-18
Version
2023.2 English

The following table shows the revision history for this document.

Section Revision Summary
10/18/2023 Version 2023.2
Synthesis Added a tip.
Dynamic Function Exchange Design Changed DFx to DFX.
Hierarchical Design Removed reference to UG905.
Dynamic Function Exchange Design Changed DFx to DFX.
Working with the Vivado Integrated Design Environment (IDE) Updated the figure.
Configuring IP Updated the licensing URL.
Launching the Vivado IDE on Windows
  • Updated text from Xilinx Design Tools to AMD Design Tools.
  • Updated desktop icon.
Out-of-Context Design Flow Removed reference to UG905.
Creating and Managing Runs Updated the figure.
Viewing or Editing Device Properties Updated the figure.
Opening an Elaborated RTL Design Updated the figure.
Opening a Synthesized Design Updated the figure.
Opening an Implemented Design Updated the figure.
Opening the Vivado IDE From the Active Design Updated the figure.
Archiving Designs Updated the tcl command from archive_design to archive_project.
05/10/2023 Version 2023.1
Embedded Processor Design, Creating IP Subsystems with IP Integrator, and References Changed reference for UG898 to UG1579.
Model-Based DSP Design Using AMD Vitis Model Composer Changed System Generator to Vitis Model Composer and updated link.
Using Project Mode Updated the figure.
Understanding the Flow Navigator Updated the figure.
Methods to Revision Control a Project Added a note.
Solution Center Removed topic.