Managing IP Settings - 2023.2 English

Vivado Design Suite User Guide: Designing with IP (UG896)

Document ID
UG896
Release Date
2023-11-03
Version
2023.2 English

To manage the IP settings, enter the following information, and click Finish:

  • Part: Select the active part. All output products generated for the IP are based on the specified part.
  • Target language: Set the target language to the language of the top-level module of your design.
  • Target Simulator: Specify the simulator to use as either the Vivado simulator, or one of a number of third-party simulators.
  • Simulator language: Options are VHDL, Verilog, SystemVerilog, or Mixed depending on the license that you have available for the simulator. For the Vivado simulator, the default is Mixed.
  • IP location: The location where the Vivado IDE creates the managed_ip_project directory.
Note: IP location might be referred to as an IP Repository.

Vivado IDE opens the Managed IP project, and you can now select and customize IP. You have access to the full IP catalog, including IP Product Guides, Change Logs, Product web pages, and Answer Records.

After you customize an IP, the Sources and Properties windows display, providing information about the IP created in the project.

Each IP customization has a directory created under the specified manage IP location. This directory contains the Xilinx custom interface (XCI) file and any generated output products. The following figure shows the Manage IP Project window where you customize and manage multiple IP.

Figure 1. Manage IP Project Window Containing Three IP

CAUTION:
When creating a new AXI4 peripheral, verification through the AXI4 VIP and JTAG interface are not available. To use this peripheral verification, you must create a Vivado project with that peripheral.