The XDC files that an IP delivers are scoped to the IP instance(s) using two properties on the XDC file(s):
SCOPED_TO_REF: Specifies the module to which to apply the XDC file.
SCOPED_TO_CELLS: Specifies the cell within the module to which to apply the XDC file.
For more information on these properties see Vivado Design Suite User Guide: Using Constraints (UG903).
When overriding IP constraints at the top-level you have two choices:
- Specify the hierarchy to specific cell of the IP. If there are multiple instances of
the IP, do either of the following:
- Use wild cards
- Duplicate the constraint for each IP
- Use the
SCOPED_TO_CELLSproperties that the IP uses and write your constraints as if the IP cell were the top-level of the hierarchy (recommended).
To find the
you can use the
report_compile_order -constraints command. Look at the
synthesis or implementation section for the IP fileset.
SCOPED_TO_REF is typically the IP
customization name. The
SCOPED_TO_CELLS is typically
inst in Verilog or
U0 in VHDL.
recommends you create a new
XDC or Tcl file and place all the XDC/Tcl commands to override the IP XDC and set the
SCOPED_TO_CELLS properties to match what
The complete procedure is, as follows:
- Create a new XDC or Tcl file and add it to your active constraint set.
- Place any XDC or Tcl commands required to override the IP XDC in the new file.
- Use the
set_propertycommand to set the
set_property SCOPED_TO_REF <REF> [get_files <new XDC/Tcl file>] set_property SCOPED_TO_CELLS <CELL> [get_files <new XDC/Tcl file>]
- Mark the XDC/Tcl file to be used in implementation only:
set_property USED_IN IMPLEMENTATION [get_files <net XDC/Tcl file]