Exporting Simulation Files and Scripts - 2023.2 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

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2023.2 English

Running a simulation from the command line for either a behavioral or timing simulation requires you to perform the following steps:

  1. Identifying and parsing design files.
  2. Elaborating and generating an executable simulation snapshot of the design.
  3. Running simulation using the executable snapshot.

The Vivado Design Suite provides an Export Simulation command to let you quickly gather the design files required for simulation, and generate the simulation scripts for the top-level RTL design, or a sub-design. The export_simulation command generates scripts for all of the supported third-party simulators or for the target simulator of your choice.

From within the Vivado IDE, use the File > Export > Export Simulation command to open the Export Simulation dialog box as shown in the following figure.

Figure 1. Export Simulation Dialog Box

The Export Simulation command writes a simulation script file for all supported simulators or for the specified Target simulator. The generated scripts contain simulator commands for compiling, elaborating, and simulating the design.

The features of the Export Simulation dialog box include the following:

  • Target simulator: Specifies all simulators, or a specific simulator to generate command line scripts for. Target simulators include Vivado simulator as well as various supported third-party simulators. Refer to Simulating with Third-Party Simulators for more information.
    Note: On the Windows operating system, scripts are only generated for those simulators that run on Windows.
    Note: In the command line mode, the equivalent option, -simulator, has a value called all that generates the scripts for all supported simulators. This is supported for the command line only and not in the GUI.
  • Compiled library location: To perform a simulation with the script generated by Export Simulation, your simulation libraries must first be compiled with the compile_simlib Tcl command. The generated scripts automatically include the setup files needed for the target simulator from the compiled library directory. Refer to Compiling Simulation Libraries for more information.
    Tip: It is recommended to provide the path to the Compile library location whenever running Export Simulation. This ensures that the scripts always point to the correct simulation libraries.
  • Export directory: Specifies the output directory for the scripts written by Export Simulation. By default, the simulation scripts are written to the local directory of the current project.
  • Overwrite files: Overwrites the files of the same name that already exist in the export directory.
  • Use absolute paths: By default, source files and directory paths in the generated scripts are relative to a reference directory that is defined in the scripts. Use this switch to make file paths in the script absolute rather than relative.
  • Copy source files to export directory: Copy design files to the output directory. This copies the simulation source files as well as the generated scripts to make the entire simulation folder more portable.
  • Command: This field provides the Tcl command syntax for the export_simulation command that are run as a result of the various options and settings that you have specified in the Export Simulation dialog box.
  • Help: For detailed information on various options in Export Simulation Files dialog box, click the Help button.

The Export Simulation command supports both project and non-project designs. It does not read properties from the current project to query for Verilog defines and includes directories. Instead, the Export Simulation command gets directives from the dialog box or from export_simulation command options. You must specify the appropriate options to get the results you want. In addition, you must have output products generated for all IP and BD that are used in the top-level design.

Important: The export_simulation command does not generate output products for IP and BD if they do not exist. Instead, it returns an error and exits.

When you click OK on the Export Simulation dialog box, the command gets the simulation compile order of all design files required for simulating the specified design object: the top-level design, a hierarchical module, IP core, a block design from Vivado IP integrator, or a Managed IP project with multiple IP. The simulation compile order of the required design files is exported to a shell script with compiler commands and options for the target simulator.

The simulation scripts are written to separate folders in the Export directory as specified in the Export Simulation dialog box. A separate folder is created for each specified simulator, and compile, elaborate, and simulate scripts are written for the simulator.

The scripts generated by the Export Simulation command uses a 3-step process, analyze/compile, elaborate, and simulate, that is common to many simulators including the Vivado simulator. However, for ModelSim and Riviera, the generated scripts use the two-step process of compile and simulate that the tool requires.

Tip: To use the two-step process in the Questa simulator, you can start with the scripts generated for ModelSim and modify them as needed.

The Export Simulation command also copies data files (if any) from the fileset, or from an IP, to the specified export directory. If the design contains Verilog sources, then the generated script also copies the glbl.v file from the Vivado software installation path to the output directory.

export_ip_user_files -no_script -force
export_simulation -directory "C:/Data/project_wave1" -simulator all 

When you run the Export Simulation command from the dialog box, the Vivado IDE actually runs a sequence of commands that defines the base directory (or location) for the exported scripts, exports the IP user files, and then runs the export_simulation command.

The export_ip_user_files command is run automatically by the Vivado IDE to ensure that all required files needed to support simulation for both core container and non-core container IP, as well as block designs, are available. See this link in the Vivado Design Suite User Guide: Designing with IP (UG896) for more information. While export_ip_user_files is run automatically when working with the Export Simulation dialog box, you must be sure to run it manually before running the export_simulation command.

Tip: The -no_script option is specified when export_ip_user_files is run automatically by the Vivado IDE. This is to prevent the generation of simulation scripts for the individual IP and BDs that are used in the top-level design because it can add significant run time to the command. However, you can generate these simulation scripts for individual IP and BD by running export_ip_user_files on specified objects (-of_objects), or without the -no_script option.

The export_ip_user_files command sets up the user file environment for IP and block design needed for simulation and synthesis. The command creates a folder called ip_user_files, which contains instantiation templates, stub files for use with third-party synthesis tools, wrapper files, memory initialization files, and simulation scripts.

The export_ip_user_files command also consolidates static simulation files that are shared across all IP and block designs in the project and copies them to an ipstatic folder. Many of the IP files that are shared across multiple IP and BDs in a project do not change for specific IP customizations. These static files are copied into the ipstatic directory. The scripts created for simulation reference the shared files in this directory as needed. The dynamic simulation files that are specific to an IP customization are copied to the IP folder. See Understanding IP User Files in Vivado Design Suite User Guide: Designing with IP (UG896) for more information.

Important: The scripts and files generated by the export_simulation command point to the files in the ip_user_files directory. You must run the export_ip_user_files command before you run export_simulation or simulation errors might occur.