Loop Statements - 2023.2 English

Several types of loops that are supported in Vivado synthesis and SystemVerilog. One of the most common is the for loop. Following is the syntax:

for (initialization; expression; step) statement;

A for loop starts with the initialization and evaluates the expression. If the expression evaluates to 0, it stops and executes; otherwise, if it evaluates to 1, it continues with the statement. When it is done with the statement, it executes the step function.

• A repeat loop works by performing a function a stated number of times. Following is the syntax:

  repeat (expression) statement;

This syntax evaluates the expression to a number, and executes the statement the specified number of times.

• The for-each loop executes a statement for each element in an array.
• The while loop takes an expression and a statement and executes the statement until the expression is false.
• The do-while loop performs the same function as the while loop, but instead it tests the expression after the statement.
• The forever loop executes all the time. To avoid infinite loops, use it with the break statement to get out of the loop.